Engineers are beginning to appreciate that, from prototypes early in the design cycle through to final system test, a digital pattern generator (DPG) speeds up system debug and therefore shortens the ...

Large digital integrated circuits are becoming harder to test in a time- and cost-efficient manner. AI chips, in particular, have tiled architectures that are putting pressure on older testing ...

Design for testability (DFT) works to make a circuit more testable to ensure that it was manufactured correctly. Alfred Crouch explains the purpose of DFT in his book, Design-For-Test for Digital ICs ...

Automatic test-pattern generation (ATPG) has played a key role in semiconductor logic test, but several trends driving the need for semiconductor test quality are challenging traditional ATPG tools.

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...

Anyone involved in IC product sign-off that includes a mixed signal design portion knows that developing robust tests for these intricate designs has historically been a significant bottleneck, no ...