CRN

Violin Memory Unveils Cache Appliances For File-Based Data

Scalable memory array developer Violin Memory this week unveiled a new multiterabyte capacity solid-state cache memory system aimed at increasing the storage performance of enterprise applications.
EDN

SoC design: When a network-on-chip meets cache coherency

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To ...
Electronic Design

CXL: Coherency, Memory, and I/O Semantics on PCIe Infrastructure

Gain insight into the CXL specification. Learn how CXL supports dynamic multiplexing between a rich set of protocols that includes I/O (CLX.io, based on PCIe), caching (CXL.cache), and memory (CXL.mem ...
Semiconductor Engineering

Evaluation of Cache Replacement Policies Using Various Typical Simulation Approaches

A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven.
EDN

First highly integrated power-management IC for DDR cache-memory battery backup eliminates multiple discrete components in existing solutions

Maxim Integrated Products (PINK OTC MARKETS: MXIM) introduces the DS2731 integrated power-management IC (PMIC) for DDR cache-memory backup. This PMIC integrates a single-cell Li+ charger, ...
TechSpot

AMD 3D V-Cache CPU memory used to create incredibly fast RAM disk

Why it matters: A RAM drive is traditionally conceived as a block of volatile memory "formatted" to be used as a secondary storage disk drive. RAM disks are extremely fast compared to HDDs or even ...
CSOonline

New Linux kernel cross-cache attack allows arbitrary memory writes

Researchers from the Graz University of Technology have discovered a way to convert a limited heap vulnerability in the Linux kernel into a malicious memory writes capability to demonstrate novel ...